loconet:lnpe-parms-de
no way to compare when less than two revisions
Differences
This shows you the differences between two versions of the page.
— | loconet:lnpe-parms-de [2018/11/12 08:56] (current) – created - external edit 127.0.0.1 | ||
---|---|---|---|
Line 1: | Line 1: | ||
+ | ====== LocoNet Parameter Summary ====== | ||
+ | [[: | ||
+ | \\ | ||
+ | [[: | ||
+ | * **[[: | ||
+ | * **Parameter** | ||
+ | // \\ // \\ | ||
+ | |||
+ | |||
+ | ===== Copyright ===== | ||
+ | LocoNet® Personal Use version definitions 1.0\\ | ||
+ | All Copyrights and rights reserved, Digitrax 1997\\ | ||
+ | |||
+ | \\ | ||
+ | ===== Erläuterung ===== | ||
+ | ==== ms- und ls- Bits ==== | ||
+ | In einem Argument können nur 7 Bit übertragen werden. Bestimmte Daten, wie beispielsweise die Lokadressen, | ||
+ | ==== Slot ==== | ||
+ | Bei Digitalzentralen wird in der Regel angegeben wie viele Loks gleichzeitig gesteuert werden können. Für jede gleichzeitig gesteuerte Lok gibt es in der Zentrale einen sog. Slot. In diesem wird der aktuelle Soll-Zustand (Lokadresse, | ||
+ | |||
+ | |||
+ | \\ | ||
+ | |||
+ | ===== Parameter ===== | ||
+ | ^ Name ^ Description | ||
+ | | **ADR** | ||
+ | | **ADR2** | ||
+ | | **SW1** | ||
+ | | **SW1** | ||
+ | | | DIR, Stellrichtung des Magnetartikels | 1=gerade(grün), | ||
+ | | | ON, Schaltzustand | Ausgang 1=An, 0=Aus | | ||
+ | | **SLOT** | 7 bit Slot-Nummer | 0..127 | | ||
+ | | **SRC** | ||
+ | | **DEST** | 7 bit Ziel-Slot-Nummer | 0..127 | | ||
+ | | **SL1** | ||
+ | | **SL2** | ||
+ | | **SPD** | Geschwindigkeit | 0x00=Geschwindigkeit 0 ,Anhalten\\ 0x01=Geschwindigkeit 0 Notbremsung EMERGENCY stop\\ 0x02-0x7F Geschwindigkeitsstufen , | ||
+ | | **DIRF** | Fahrrichtung und Funktionen F0 bis F4 | 0, | ||
+ | | **SND** | slot sound | 0, | ||
+ | | **STAT1** | Slot Status inkl. Geschwindigkeitsstufen | siehe unten | | ||
+ | | **SS2** | ||
+ | | | D0 | 1=this slot has suppressed ADV consist | | ||
+ | | | D2 | 1=expansion ID1/2 is not ID usage | | ||
+ | | | D3 | 1=expansion IN ID1/2, 0=encoded alias | | ||
+ | | **LOPC** | Kopie der Kommando-Codes | Das 7. Bit wird 0 gesetzt | | ||
+ | | **ACK1** | Antwort-Code | 0=fehlgeschlagen | | ||
+ | | **IN1** | 6-ls Bits der Rückmelder-Adresse | 0, | ||
+ | | **IN2** | 4-ms Bits der Rückmelder-Adresse und Status | 0, | ||
+ | | | X, Steuerbit | 0=für zukünftige Verwendung reserviert | | ||
+ | | | I, Eingangsquelle | 0=DS54, 1=Schalter | | ||
+ | | | L, Rückmelde-Zustand | 0=deaktiviert, | ||
+ | | **SN1** | 7 ls Bits der Adresse des Weichen-Lage-Rückmelders | 0, | ||
+ | | **SN2** | 4 ms Bits des Adresse des Weichen-Lage-Rückmelders und Status| 0, | ||
+ | | | I, Eingangstyp | 1=Weiche, 0=sonstiges | | ||
+ | | | L, Rückmeldezustand | 0=deaktiviert, | ||
+ | | **SN2** | Alternatives Format für 4 ms Bits der Adresse des Weichen-Lage-Rückmelders und Status | 0, | ||
+ | | | C, Zustand des Ausgangs für Gerade | 0=Aus, 1=An | | ||
+ | | | T, Zustand des Ausgangs für Abzweigend | 0=Aus, 1=An | | ||
+ | | **ID1** | Fahrregler/ | ||
+ | | **ID2** | Fahrregler/ | ||
+ | |||
+ | |||
+ | \\ | ||
+ | ====Slot Status 1==== | ||
+ | * **D7-SL_SPURGE** | ||
+ | * 1=SLOT purge en,ALSO adrSEL (INTERNAL use only, not seen on NET!)\\ CONDN/ | ||
+ | |||
+ | \\ | ||
+ | ===2 BITS for Consist=== | ||
+ | * **D6-SL_CONUP** | ||
+ | * **D3-SL_CONDN** | ||
+ | * 11=LOGICAL MID CONSIST , Linked up AND down | ||
+ | * 10=LOGICAL CONSIST TOP, Only linked downwards | ||
+ | * 01=LOGICAL CONSIST SUB-MEMBER, Only linked upwards | ||
+ | * 00=FREE locomotive, no CONSIST indirection/ | ||
+ | |||
+ | \\ | ||
+ | ===2 BITS for BUSY/ | ||
+ | * **D5-SL_BUSY** | ||
+ | * **D4-SL_ACTIVE** | ||
+ | * 11=IN_USE loco adr in SLOT -REFRESHED | ||
+ | * 10=IDLE loco adr in SLOT, not refreshed | ||
+ | * 01=COMMON loco adr IN SLOT, refreshed | ||
+ | * 00=FREE SLOT, no valid DATA, not refreshed | ||
+ | |||
+ | \\ | ||
+ | ===3 BITS for Decoder TYPE encoding for this SLOT=== | ||
+ | * **D2-SL_SPDEX** | ||
+ | * **D1-SL_SPD14** | ||
+ | * **D0-SL_SPD28** | ||
+ | * 010=14 step MODE | ||
+ | * 001=28 step. Generate Trinary packets for this Mobile ADR | ||
+ | * 000=28 step/ 3 BYTE PKT regular mode | ||
+ | * 011=128 speed mode packets | ||
+ | * 111=128 Step decoder, Allow Advanced DCC consisting | ||
+ | * 100=28 Step decoder ,Allow Advanced DCC consisting | ||
+ | |||
+ | |||
+ | |||
+ | \\ | ||
+ | |||
+ | ===== Slots ===== | ||
+ | ^ Nr. ^ Description | ||
+ | | 0 | dispatch | | ||
+ | | 1 - 119 | active locos | | ||
+ | | 120 - 127 | reserved for System and Master control | | ||
+ | | 123 | Fast Clock | | ||
+ | | 124 | Programming Track | | ||
+ | | 127 | Command Station Options | | ||
+ | |||
+ | |||
+ | \\ | ||
+ | ===== Programmer track ===== | ||
+ | Der Zugriff auf das Programmiergleis erflogt als Spezial-Slot #124 ( $7C, 0x7C). Es ist eine voll asynchron geteilte System-Resource.\\ | ||
+ | Zum Start eines Programmier-Tasks in Slot 124 schreiben. Es erfolgt unmittelbar ein LACK acknowledge, | ||
+ | \\ | ||
+ | |||
+ | ==== Parameters ==== | ||
+ | ^ Name ^ Description | ||
+ | | **ACK1¹** | response code | 0=busy/ | ||
+ | | **PCMD** | programmer command (0 will abort current operation) | 0, | ||
+ | | | WR, Write/Read | 1=Write, 0=Read | | ||
+ | | | MD, Byte mode | 1=byte operation, 0=bit operation (if possible) | | ||
+ | | | OPS, Ops Mode | 1=Mainline, 0=PT | | ||
+ | | **PSTAT²** | programmer error flags | 0, | ||
+ | | | D3 | 1=User aborted | | ||
+ | | | D2 | 1=No read ack | | ||
+ | | | D1 | 1=No write ack | | ||
+ | | | D0 | 1=Programming track empty | | ||
+ | | **HOPSA** | operations mode programming | 7 bit high addres, 0 if service mode (POM) | | ||
+ | | **LOPSA** | operations mode programming | 7 bit low addres, 0 if service mode (POM) | | ||
+ | | **CVH** | CV# | 0, | ||
+ | | **CVL** | CV# | 0, | ||
+ | | **DATA7** | data | 0, | ||
+ | ¹) | ||
+ | Note that the <7F> code will occur in Operations Mode Read requests if the System is not configured for | ||
+ | and has no Advanced Acknowlegement detection installed.. Operations Mode requests can be made and | ||
+ | executed whilst a current Service Mode programming task is keeping the Programming track BUSY. If a | ||
+ | Programming request is rejected, delay and resend the complete request later. Some readback operations | ||
+ | can keep the Programming track busy for up to a minute. Multiple devices, throttles/ | ||
+ | and sequentially use the Programming track as long as they correctly interpret the response messages . | ||
+ | Any Slot RD from the master will also contain the Programmer Busy status in bit 3 of the <TRK> byte.\\ | ||
+ | \\ | ||
+ | ²) | ||
+ | This <E7> response is issued whenever a Programming task is completed. It echos most of the request | ||
+ | information and returns the PSTAT status code to indicate how the task completed. If a READ was | ||
+ | requested < | ||
+ | (typically =0). Note that if a Paged Read fails to detect a successful Page write acknowledge when first | ||
+ | setting the Page register, the read will be aborted, showing no Write acknowledge flag D1=1\\ | ||
+ | \\ | ||
+ | |||
+ | \\ | ||
+ | |||
+ | ====Type codes==== | ||
+ | ^Byte Mode^ Ops Mode^ TY1^ TY0^ Meaning^ | ||
+ | | 1 | 0 | 0 | 0 | Paged mode byte Read/Write on Service Track | | ||
+ | | 1 | 0 | 0 | 0 | Paged mode byte Read/Write on Service Track | | ||
+ | | 1 | 0 | 0 | 1 | Direct mode byteRead/ | ||
+ | | 0 | 0 | 0 | 1 | Direct mode bit Read/Write on Service Track | | ||
+ | | x | 0 | 1 | 0 | Physical Register byte Read/Write on Service Track | | ||
+ | | x | 0 | 1 | 1 | Service Track- reserved function | | ||
+ | | 1 | 1 | 0 | 0 | Ops mode Byte program, no feedback | | ||
+ | | 1 | 1 | 0 | 1 | Ops mode Byte program, feedback | | ||
+ | | 0 | 1 | 0 | 0 | Ops mode Bit program, no feedback | | ||
+ | | 0 | 1 | 0 | 1 | Ops mode Bit program, feedback |\\ | ||
+ | |||
+ | |||
+ | \\ | ||
+ | \\ | ||
+ | ===== Multi Sense ===== | ||
+ | Power and transponding information is brought with the **'' | ||
+ | ===Power=== | ||
+ | ^ Variable ^ Value ^ | ||
+ | | ARG1 | ? | | ||
+ | | ARG2 | ? | | ||
+ | | ARG3 | ? | | ||
+ | | ARG4 | ? | | ||
+ | |||
+ | \\ | ||
+ | ===Transponding=== | ||
+ | ^ Variable ^ Value ^ | ||
+ | | ARG1 | type, present/ | ||
+ | | ARG2 | low part board address and Zone A to H in the lower 4 bits | | ||
+ | | ARG3 | high part of transponding mobile decoder address | | ||
+ | | ARG4 | low part of transponding mobile decoder address | | ||
+ | |||
+ | \\ | ||
+ | |||
+ | ===== Functions 9-12 ===== | ||
+ | | Digitrax || Uhlenbrock || | ||
+ | ^ Variable ^ Value ^ Variable ^ Value ^ | ||
+ | | OPC | OPC_IMM_PACKET | OPC | OPC_UHLI_FUN | | ||
+ | | REPS | 0x24 for short and 0x34 for long address| Arg1 | 0x20 | | ||
+ | | DHI | 0x02 or 0x04 + high bits of address and functions | Arg2 | Slot# | | ||
+ | | IM1 | long address Lo | Arg3 | 0x07 | | ||
+ | | IM2 | long address Hi | Arg4 | f9=0x10, f10=0x20, f11=0x40 | | ||
+ | | IM3 | 0x20 + function bits & 0x7f | | ||
+ | | IM4 | 0x00 | | ||
+ | | IM5 | 0x00 | | ||
+ | | IM1 | short address | | ||
+ | | IM2 | 0x20 + function bits & 0x7f | | ||
+ | | IM3 | 0x00 | | ||
+ | | IM4 | 0x00 | | ||
+ | | IM5 | 0x00 | | ||
+ | |||
+ | |||
+ | \\ | ||
+ | ===== Functions 13-20 ===== | ||
+ | | Digitrax || Uhlenbrock || | ||
+ | ^ Variable ^ Value ^ Variable ^ Value ^ | ||
+ | | OPC | OPC_IMM_PACKET | OPC | OPC_UHLI_FUN | | ||
+ | | REPS | 0x34 for short and 0x44 for long address| Arg1 | 0x20 | | ||
+ | | DHI | 0x02 or 0x04 + high bits of address and functions | Arg2 | Slot# | | ||
+ | | IM1 | long address Lo | Arg3 | 0x05=f12+f20+f28, | ||
+ | | IM2 | long address Hi | Arg4 | f12=0x10, f20=0x20, f28=0x40, f13=0x01...f19=0x40 | | ||
+ | | IM3 | 0x5E | | ||
+ | | IM4 | function bits & 0x7f | | ||
+ | | IM5 | 0x00 | | ||
+ | | IM1 | short address | | ||
+ | | IM2 | 0x5E | | ||
+ | | IM3 | function bits & 0x7f | | ||
+ | | IM4 | 0x00 | | ||
+ | | IM5 | 0x00 | | ||
+ | |||
+ | |||
+ | \\ | ||
+ | |||
+ | ===== Functions 21-28 ===== | ||
+ | | Digitrax || Uhlenbrock || | ||
+ | ^ Variable ^ Value ^ Variable ^ Value ^ | ||
+ | | OPC | OPC_IMM_PACKET | OPC | OPC_UHLI_FUN | | ||
+ | | REPS | 0x34 for short and 0x44 for long address| Arg1 | 0x20 | | ||
+ | | DHI | 0x06 + high bits of address and functions | Arg2 | Slot# | | ||
+ | | IM1 | long address Lo | Arg3 | 0x09 | | ||
+ | | IM2 | long address Hi | Arg4 | f21=0x01...f27=0x40 | | ||
+ | | IM3 | 0x5F | | ||
+ | | IM4 | function bits & 0x7f | | ||
+ | | IM5 | 0x00 | | ||
+ | | IM1 | short address | | ||
+ | | IM2 | 0x5F | | ||
+ | | IM3 | function bits & 0x7f | | ||
+ | | IM4 | 0x00 | | ||
+ | | IM5 | 0x00 | | ||
+ | |||
+ | |||
+ | |||
+ | |||
+ | \\ | ||
+ | |||
+ | ===== Fast Clock ===== | ||
+ | \\ | ||
+ | The system FAST clock and parameters are implemented in Slot#123 < | ||
+ | Use <EF> to write new clock information, | ||
+ | clock information, | ||
+ | keep a current clock calculation based on this SYNC read value, i.e. devices MUST not continuously poll | ||
+ | the clock SLOT to generate time, but use this merely to restore SYNC and follow current RATE etc. This | ||
+ | clock slot is typically " | ||
+ | devices can synchronise any phase drifts. Upon seeing a SYNC read, all devices should reset their local | ||
+ | sub-minute phase counter and invalidate the SYNC update ping generator. | ||
+ | |||
+ | ==== Parameters ==== | ||
+ | |||
+ | ^ Name ^ Description | ||
+ | | **CLK_RATE** | Clock rate | 0=Freeze clock, 1=normal 1:1 rate, 10=10:1 etc, max VALUE is 7F/128 to 1 | | ||
+ | | **FRAC_MINSH/ | ||
+ | | **256-MINS_60** | This is FAST clock MINUTES subtracted from 256. | Modulo 0-59 | | ||
+ | | **256-HRS_24** | This is FAST clock HOURS subtracted from 256. | Modulo 0-23 | | ||
+ | | **DAYS** | number of 24 Hr clock rolls, positive count | | | ||
+ | | **CLK_CNTRL** | Clock Control Byte | D6- 1=This is valid Clock information, | ||
+ | | **ID1/2** | This is device ID last setting the clock. | < | ||
+ | |||
+ | |||
+ | \\ | ||
+ | |||
+ | =====Stationary Broadcast Command===== | ||
+ | Note that a 3 byte DCC track packet configured as:\\ | ||
+ | < | ||
+ | < | ||
+ | Broadcast LocoNet Switch adr is then < | ||
+ | |||
+ | \\ | ||
+ | |||
+ | =====Stationary Interrogate Command===== | ||
+ | The DCC packet < | ||
+ | causes a 2 LocoNet <B1> messages encoding both Output state and Input state, for each sensor adr a/b/c | ||
+ | encodes. | ||
+ | Interrogate LocoNet Switch adr is < | ||
+ | This is generated by DCS100 at power ON, and scans all 8 inputs of all DS54' | ||
+ | |||
+ | |||
loconet/lnpe-parms-de.txt · Last modified: 2018/11/12 08:56 by 127.0.0.1