|Do not translate. Work in progress.|
|By Peter Giling & Robert Evers|
The LocoIO firmware is originally created by John Jabour and the assembly sources we got from him.
Someone did pickup the development some time ago, by reengineering the HEX files and in closed source.
The delta between the last version of John and the currently used one is not available to us in form of editable source.
To get rid of this impasse we decided to develop a LocoIO based on an AT and the open source Embedded LocoNet from Fremo.
Due to the fact that already many MGV50 boards are used, it is advisable to create a board which is completely equal to MGV50,
both in connections and shape.
In hardware, it is rather simple to replace PIC16F873 by ATMega8.
Footprint and crystal connections are identical, as well as the major power pins.
Interface should have ICSP connector to achieve faster in circuit developments.
|2||RA0 (AN0)||PD0 (RXD)|
|3||RA1 (AN1)||PD1 (TXD)|
|4||RA2 (AN2/Vref-)||PD2 (INT0)|
|5||RA3 (AN3/Vref+)||PD3 (INT1)|
|6||RA4 (T0CKI)||PD4 (XCK/T0)|
|11||RC0 (T1OSO/T1CKI)||PD5 (T1)|
|12||RC1 (T1OSI/CCP2)||PD6 (AIN0)|
|13||RC2 (CCP1)||PD7 (AIN1)|
|14||RC3 (SCK/SCL)||PB0 (ICP1)|
|15||RC4 (SDI/SDA)||PB1 (OC1A)|
|16||RC5 (SDO)||PB2 (NSS/OC1B)|
|17||RC6 (TX/CK)||PB3 (MOSI/OC2)|
|18||RC7 (RX/DT)||PB4 (MISO)|
|24||RB3 (PGM)||PC1 (ADC1)|
|27||RB6 (PGC)||PC4 (ADC4/SDA)|
|28||RB7 (PGD)||PC5 (ADC5/SCL)|